Logic Gates

 

Logic gates

Introduction:

Logic gates are the basic building blocks of digital electronics. They are used in telecommunications, calculators, computers, robots, industrial control systems etc.

In digital signals only discrete values of voltages are possible. To obtain the discrete values of voltages a pulse waveform is used which shows only two values of voltages.

HIGH voltage is written as 1 i.e. ON condition and LOW voltage is written as 0 i.e. OFF condition.

The logic gates follow the logical relationship between the input and output voltages.

Analog signal and Digital signal:

Continuous time varying voltage Vs Only two levels of voltages (HIGH or LOW)

                           

In fig. 1 the voltage has all values range from (0 – 5 volt). Thus as time changes, the voltage change from 0 – 5 volt or 5 – 0 volt.

In fig.2 the voltage has only two values 5 volt and 0 volt.

The HIGH/ON = 5 V

The LOW/OFF = 0 V

A digital circuit with one or more inputs but only one output signal is called a logic gate.

Logic gate is a switching circuit. It controls the flow of signal or information.

There are five common logic gates NOT Gate, AND Gate and OR Gate, NOR Gate, NAND Gate.

NOT Gate:

This is most basic gate with one input and one output. It produces 1 or HIGH at its output if the input is 0 or LOW and vice versa.

As NOT Gate produces the inversion of input at its output it is called INVERTER.

                        

                            

Above fig. shows the symbol and truth table of NOT Gate.

According to the truth table the timing diagram of NOT Gate can be drawn as

                    

                    
 OR Gate:

OR Gate performs logical addition or logical disjunction. The output of an OR gate is 1 when any one of its inputs is 1 or HIGH. The output of the OR gate is 0 only when all of its inputs are 0 or LOW.

                


Above fig. shows the symbol and truth table of OR Gate.

According to the truth table the timing diagram of OR Gate can be drawn as

                    



AND Gate:

AND Gate performs logical multiplication or logical conjunction. The output of an AND gate is 1 only when all of its inputs are 1 or HIGH. The output of the AND gate is 0 when any one of its inputs are 0 or LOW.

                                             

Above fig. shows the symbol and truth table of AND Gate.

According to the truth table the timing diagram of AND Gate can be drawn as

                        

NAND Gate:

This is AND Gate followed by NOT Gate.

The output of an NAND gate is 1 when any one of its inputs are 0 or LOW. The output of an NAND gate is 0 when all of its inputs are 1 or HIGH.

Therefore, it is called NOT AND Gate (behaviour).

NAND Gate is also called universal gate because by using the combinations of NAND Gate, other basic Gates can be obtained.

                                          

Above fig. shows the symbol and truth table of NAND Gate. According to the truth table the timing diagram of NAND Gate can be drawn as

                     

NOR Gate:

This is OR Gate followed by NOT Gate.

The output of an NOR gate is 1 only when both the inputs are low or 0. The output of NOR gate is 0 when any one of its inputs are 1 or HIGH.

Therefore, it is called NOT OR Gate (behaviour).

NOR Gate is also called universal gate because by using the combinations of NOR Gate, other basic Gates can be obtained.

                                        

Above fig. shows the symbol and truth table of NOR Gate. According to the truth table the timing diagram of NOR Gate can be drawn as

                     


Exclusive OR Gate/X-OR Gate:

Exclusive-OR gate can compare two logic levels and produce an output value dependent upon the input condition. The output of an Exclusive-OR gate goes 'HIGH' only when its two input terminals are at different logic levels with respect to each other.

An odd number of high or '1' at its input gives high or '1' at the output.

           

Above fig. shows the symbol and truth table of XOR Gate. According to the truth table the timing diagram of XOR Gate can be drawn as

                    

      



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